A Bit Plane Architecture For An Image Analysis Processor Implemented With P.L.C.A. Gate Array - researchr publication authors

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Jean-Claude Klein, François Collange, M. Bilodeau. A Bit Plane Architecture For An Image Analysis Processor Implemented With P.L.C.A. Gate Array. In Olivier D. Faugeras, editor, Computer Vision - ECCV 90, First European Conference on Computer Vision, Antibes, France, April 23-27, 1990, Proceedings. Volume 427 of Lecture Notes in Computer Science, pages 33-49, Springer, 1990.

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