Shannon Koh, Oliver Diessel. Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices. In Koen Bertels, Walid A. Najjar, Arjan J. van Genderen, Stamatis Vassiliadis, editors, FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007. pages 293-298, IEEE, 2007. [doi]
@inproceedings{KohD07:0,
title = {Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices},
author = {Shannon Koh and Oliver Diessel},
year = {2007},
doi = {10.1109/FPL.2007.4380662},
url = {http://dx.doi.org/10.1109/FPL.2007.4380662},
tags = {graph-rewriting, rewriting},
researchr = {https://researchr.org/publication/KohD07%3A0},
cites = {0},
citedby = {0},
pages = {293-298},
booktitle = {FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007},
editor = {Koen Bertels and Walid A. Najjar and Arjan J. van Genderen and Stamatis Vassiliadis},
publisher = {IEEE},
isbn = {1-4244-1060-6},
}