2 processing architecture - High reliability and low power computing for novel nano tactile sensor array

Kiyotaka Komoku, Kazutami Arimoto, Tomoyuki Yokogawa, Hitoshi Yamauchi, Yoichiro Sato, Hidekuni Takao. 2 processing architecture - High reliability and low power computing for novel nano tactile sensor array. In International SoC Design Conference, ISOCC 2016, Jeju, South Korea, October 23-26, 2016. pages 199-200, IEEE, 2016. [doi]

@inproceedings{KomokuAYYST16,
  title = {2 processing architecture - High reliability and low power computing for novel nano tactile sensor array},
  author = {Kiyotaka Komoku and Kazutami Arimoto and Tomoyuki Yokogawa and Hitoshi Yamauchi and Yoichiro Sato and Hidekuni Takao},
  year = {2016},
  doi = {10.1109/ISOCC.2016.7799856},
  url = {http://dx.doi.org/10.1109/ISOCC.2016.7799856},
  researchr = {https://researchr.org/publication/KomokuAYYST16},
  cites = {0},
  citedby = {0},
  pages = {199-200},
  booktitle = {International SoC Design Conference, ISOCC 2016, Jeju, South Korea, October 23-26, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-3219-8},
}