The following publications are possibly variants of this publication:
- 100-Gb/s Physical-Layer Architecture for Next-Generation EthernetHidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Kouji Fukuda, Kouji Nakahara, Hiroaki Nishi. ieicet, 89-B(3):696-703, 2006. [doi]
- A Novel 400-Gb/s (100-Gb/s×4) Physical-Layer Architecture Using Low-Power TechnologyMasashi Kono, Akihiro Kambe, Hidehiro Toyoda, Shinji Nishimura. ieicet, 95-B(11):3437-3444, 2012. [doi]
- A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane ApplicationsHidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Matsuaki Terada. ieicet, 90-C(10):1957-1963, 2007. [doi]
- A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane EthernetHidehiro Toyoda, Michitaka Okuno, Shinji Nishimura, Matsuaki Terada. icc 2008: 5417-5421 [doi]