Low-latency X25519 hardware implementation: breaking the 100 microseconds barrier

Philipp Koppermann, Fabrizio De Santis, Johann Heyszl, Georg Sigl. Low-latency X25519 hardware implementation: breaking the 100 microseconds barrier. Microprocessors and Microsystems, 52:491-497, 2017. [doi]

@article{KoppermannSHS17-0,
  title = {Low-latency X25519 hardware implementation: breaking the 100 microseconds barrier},
  author = {Philipp Koppermann and Fabrizio De Santis and Johann Heyszl and Georg Sigl},
  year = {2017},
  doi = {10.1016/j.micpro.2017.07.001},
  url = {https://doi.org/10.1016/j.micpro.2017.07.001},
  researchr = {https://researchr.org/publication/KoppermannSHS17-0},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {52},
  pages = {491-497},
}