Evaluation of delay fault testability of LUTs for the enhancement of application-dependent testing of FPGAs

Andrzej Krasniewski. Evaluation of delay fault testability of LUTs for the enhancement of application-dependent testing of FPGAs. Journal of Systems Architecture, 49(4-6):283-296, 2003. [doi]

@article{Krasniewski03:1,
  title = {Evaluation of delay fault testability of LUTs for the enhancement of application-dependent testing of FPGAs},
  author = {Andrzej Krasniewski},
  year = {2003},
  doi = {10.1016/S1383-7621(03)00066-3},
  url = {http://dx.doi.org/10.1016/S1383-7621(03)00066-3},
  tags = {testing},
  researchr = {https://researchr.org/publication/Krasniewski03%3A1},
  cites = {0},
  citedby = {0},
  journal = {Journal of Systems Architecture},
  volume = {49},
  number = {4-6},
  pages = {283-296},
}