Yana Esteves Krasteva, Eduardo de la Torre, Teresa Riesgo. Reconfigurable Networks on Chip: DRNoC architecture. Journal of Systems Architecture, 56(7):293-302, 2010. [doi]
@article{KrastevaTR10,
title = {Reconfigurable Networks on Chip: DRNoC architecture},
author = {Yana Esteves Krasteva and Eduardo de la Torre and Teresa Riesgo},
year = {2010},
doi = {10.1016/j.sysarc.2010.04.003},
url = {http://dx.doi.org/10.1016/j.sysarc.2010.04.003},
tags = {architecture},
researchr = {https://researchr.org/publication/KrastevaTR10},
cites = {0},
citedby = {0},
journal = {Journal of Systems Architecture},
volume = {56},
number = {7},
pages = {293-302},
}