Formal verification of an ASIC ethernet switch block

B. A. Krishna, Anamaya Sullerey, Alok Jain. Formal verification of an ASIC ethernet switch block. In Roderick Bloem, Natasha Sharygina, editors, Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2010, Lugano, Switzerland, October 20-23. pages 13-20, IEEE, 2010. [doi]

@inproceedings{KrishnaSJ10,
  title = {Formal verification of an ASIC ethernet switch block},
  author = {B. A. Krishna and Anamaya Sullerey and Alok Jain},
  year = {2010},
  url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5770927},
  researchr = {https://researchr.org/publication/KrishnaSJ10},
  cites = {0},
  citedby = {0},
  pages = {13-20},
  booktitle = {Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2010, Lugano, Switzerland, October 20-23},
  editor = {Roderick Bloem and Natasha Sharygina},
  publisher = {IEEE},
}