Automated formal verification of processors based on architectural models

Ulrich Kühne, Sven Beyer, Jörg Bormann, John Barstow. Automated formal verification of processors based on architectural models. In Roderick Bloem, Natasha Sharygina, editors, Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2010, Lugano, Switzerland, October 20-23. pages 129-136, IEEE, 2010. [doi]

@inproceedings{KuhneBBB10,
  title = {Automated formal verification of processors based on architectural models},
  author = {Ulrich Kühne and Sven Beyer and Jörg Bormann and John Barstow},
  year = {2010},
  url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5770941},
  tags = {rule-based, architecture, process modeling},
  researchr = {https://researchr.org/publication/KuhneBBB10},
  cites = {0},
  citedby = {0},
  pages = {129-136},
  booktitle = {Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2010, Lugano, Switzerland, October 20-23},
  editor = {Roderick Bloem and Natasha Sharygina},
  publisher = {IEEE},
}