A low power and soft error resilience guard-gated Quartro-based flip-flop in 45 nm CMOS technology

Sabavat Satheesh Kumar, Kumaravel Sundaram 0001, Sanjeevikumar Padmanaban, Jens Bo Holm-Nielsen, Frede Blaabjerg. A low power and soft error resilience guard-gated Quartro-based flip-flop in 45 nm CMOS technology. IET Circuits, Devices & Systems, 15(6):571-580, 2021. [doi]

@article{Kumar0PHB21,
  title = {A low power and soft error resilience guard-gated Quartro-based flip-flop in 45 nm CMOS technology},
  author = {Sabavat Satheesh Kumar and Kumaravel Sundaram 0001 and Sanjeevikumar Padmanaban and Jens Bo Holm-Nielsen and Frede Blaabjerg},
  year = {2021},
  doi = {10.1049/cds2.12052},
  url = {https://doi.org/10.1049/cds2.12052},
  researchr = {https://researchr.org/publication/Kumar0PHB21},
  cites = {0},
  citedby = {0},
  journal = {IET Circuits, Devices & Systems},
  volume = {15},
  number = {6},
  pages = {571-580},
}