Rajeev Kumar, Rahul Chaudhry, Dipankar Das, Vibha Rathi, S. K. Panda, P. P. Chakrabarti. SystemC Modeling and Validation of A RISC Processor System. In Forum on specification and Design Languages, FDL 2006, September 19-22, 2006, Darmstadt, Germany, Proceedings. pages 189-197, ECSI, 2006. [doi]
@inproceedings{KumarCDRPC06,
title = {SystemC Modeling and Validation of A RISC Processor System},
author = {Rajeev Kumar and Rahul Chaudhry and Dipankar Das and Vibha Rathi and S. K. Panda and P. P. Chakrabarti},
year = {2006},
url = {http://www.ecsi-association.org/ecsi/main.asp?l1=library&fn=def&id=379},
tags = {modeling, process modeling},
researchr = {https://researchr.org/publication/KumarCDRPC06},
cites = {0},
citedby = {0},
pages = {189-197},
booktitle = {Forum on specification and Design Languages, FDL 2006, September 19-22, 2006, Darmstadt, Germany, Proceedings},
publisher = {ECSI},
isbn = {978-3-00-019710-9},
}