Enabling Concurrent Clock and Power Gating in 32 Bit ROM

Harekrishna Kumar, Anjan Kumar, Vinay Kumar Deolia. Enabling Concurrent Clock and Power Gating in 32 Bit ROM. In 9th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2018, Bengaluru, India, July 10-12, 2018. pages 1-6, IEEE, 2018. [doi]

@inproceedings{KumarKD18,
  title = {Enabling Concurrent Clock and Power Gating in 32 Bit ROM},
  author = {Harekrishna Kumar and Anjan Kumar and Vinay Kumar Deolia},
  year = {2018},
  doi = {10.1109/ICCCNT.2018.8493779},
  url = {https://doi.org/10.1109/ICCCNT.2018.8493779},
  researchr = {https://researchr.org/publication/KumarKD18},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {9th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2018, Bengaluru, India, July 10-12, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-4430-0},
}