Implementation of Low Power and High Speed Dadda Multiplier using Xor-Xnor cell Based Hybrid Logic Full Adder

B. Ravi Kumar, P. Munaswamy, B. Chandrababu Naik, K. Swetha. Implementation of Low Power and High Speed Dadda Multiplier using Xor-Xnor cell Based Hybrid Logic Full Adder. In 14th International Conference on Computing Communication and Networking Technologies, ICCCNT 2023, Delhi, India, July 6-8, 2023. pages 1-7, IEEE, 2023. [doi]

Authors

B. Ravi Kumar

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P. Munaswamy

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B. Chandrababu Naik

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K. Swetha

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