2 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition

Raghavan Kumar, Vikram Suresh, Monodeep Kar, Sudhir Satpathy, Mark Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Gregory Chen, Ram Krishnamurthy, Vivek De, Sanu Mathew. 2 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition. In 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019. pages 234, IEEE, 2019. [doi]

@inproceedings{KumarSKSAKAHCKD19,
  title = {2 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition},
  author = {Raghavan Kumar and Vikram Suresh and Monodeep Kar and Sudhir Satpathy and Mark Anders and Himanshu Kaul and Amit Agarwal and Steven Hsu and Gregory Chen and Ram Krishnamurthy and Vivek De and Sanu Mathew},
  year = {2019},
  doi = {10.23919/VLSIC.2019.8778041},
  url = {https://doi.org/10.23919/VLSIC.2019.8778041},
  researchr = {https://researchr.org/publication/KumarSKSAKAHCKD19},
  cites = {0},
  citedby = {0},
  pages = {234},
  booktitle = {2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019},
  publisher = {IEEE},
  isbn = {978-4-86348-720-8},
}