Hardware-software architecture for priority queue management in real-time and embedded systems

N. G. Chetan Kumar, Sudhanshu Vyas, Ron K. Cytron, Christopher D. Gill, Joseph Zambreno, Phillip H. Jones. Hardware-software architecture for priority queue management in real-time and embedded systems. IJES, 6(4):319-334, 2014. [doi]

@article{KumarVCGZJ14,
  title = {Hardware-software architecture for priority queue management in real-time and embedded systems},
  author = {N. G. Chetan Kumar and Sudhanshu Vyas and Ron K. Cytron and Christopher D. Gill and Joseph Zambreno and Phillip H. Jones},
  year = {2014},
  doi = {10.1504/IJES.2014.064997},
  url = {http://dx.doi.org/10.1504/IJES.2014.064997},
  researchr = {https://researchr.org/publication/KumarVCGZJ14},
  cites = {0},
  citedby = {0},
  journal = {IJES},
  volume = {6},
  number = {4},
  pages = {319-334},
}