A low-power SHA-3 designs using embedded digital signal processing slice on FPGA

Dur-e-Shahwar Kundi, Arshad Aziz. A low-power SHA-3 designs using embedded digital signal processing slice on FPGA. Computers & Electrical Engineering, 55:138-152, 2016. [doi]

@article{KundiA16,
  title = {A low-power SHA-3 designs using embedded digital signal processing slice on FPGA},
  author = {Dur-e-Shahwar Kundi and Arshad Aziz},
  year = {2016},
  doi = {10.1016/j.compeleceng.2016.04.004},
  url = {http://dx.doi.org/10.1016/j.compeleceng.2016.04.004},
  researchr = {https://researchr.org/publication/KundiA16},
  cites = {0},
  citedby = {0},
  journal = {Computers & Electrical Engineering},
  volume = {55},
  pages = {138-152},
}