A 10-bit 250 MS/s Binary Search and Two channel SAR ADC by a two-bit per Conversion with Error Tolerance Ability

Ko-Chi Kuo. A 10-bit 250 MS/s Binary Search and Two channel SAR ADC by a two-bit per Conversion with Error Tolerance Ability. In 2019 International SoC Design Conference, ISOCC 2019, Jeju, Korea (South), October 6-9, 2019. pages 1-2, IEEE, 2019. [doi]

@inproceedings{Kuo19-5,
  title = {A 10-bit 250 MS/s Binary Search and Two channel SAR ADC by a two-bit per Conversion with Error Tolerance Ability},
  author = {Ko-Chi Kuo},
  year = {2019},
  doi = {10.1109/ISOCC47750.2019.9027763},
  url = {https://doi.org/10.1109/ISOCC47750.2019.9027763},
  researchr = {https://researchr.org/publication/Kuo19-5},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {2019 International SoC Design Conference, ISOCC 2019, Jeju, Korea (South), October 6-9, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-2478-0},
}