Abdul Majeed Kottampara Kuppalath, Binsu J. Kailath. PLL architecture with a composite PFD and variable loop filter. IET Circuits, Devices & Systems, 12(3):256-262, 2018. [doi]
@article{KuppalathK18,
title = {PLL architecture with a composite PFD and variable loop filter},
author = {Abdul Majeed Kottampara Kuppalath and Binsu J. Kailath},
year = {2018},
doi = {10.1049/iet-cds.2017.0336},
url = {https://doi.org/10.1049/iet-cds.2017.0336},
researchr = {https://researchr.org/publication/KuppalathK18},
cites = {0},
citedby = {0},
journal = {IET Circuits, Devices & Systems},
volume = {12},
number = {3},
pages = {256-262},
}