Efficient Generation of Energy and Performance Pareto Front for FPGA Designs (Abstract Only)

Sanmukh R. Kuppannagari, Viktor K. Prasanna. Efficient Generation of Energy and Performance Pareto Front for FPGA Designs (Abstract Only). In George A. Constantinides, Deming Chen, editors, Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 22-24, 2015. pages 273, ACM, 2015. [doi]

@inproceedings{KuppannagariP15,
  title = {Efficient Generation of Energy and Performance Pareto Front for FPGA Designs (Abstract Only)},
  author = {Sanmukh R. Kuppannagari and Viktor K. Prasanna},
  year = {2015},
  doi = {10.1145/2684746.2689133},
  url = {http://doi.acm.org/10.1145/2684746.2689133},
  researchr = {https://researchr.org/publication/KuppannagariP15},
  cites = {0},
  citedby = {0},
  pages = {273},
  booktitle = {Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 22-24, 2015},
  editor = {George A. Constantinides and Deming Chen},
  publisher = {ACM},
  isbn = {978-1-4503-3315-3},
}