Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems

Farid Lahrach, Abderrahim Doumar, Eric Châtelet. Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems. In 14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland. pages 231-238, IEEE, 2011. [doi]

@inproceedings{LahrachDC11,
  title = {Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems},
  author = {Farid Lahrach and Abderrahim Doumar and Eric Châtelet},
  year = {2011},
  doi = {10.1109/DSD.2011.33},
  url = {http://doi.ieeecomputersociety.org/10.1109/DSD.2011.33},
  researchr = {https://researchr.org/publication/LahrachDC11},
  cites = {0},
  citedby = {0},
  pages = {231-238},
  booktitle = {14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland},
  publisher = {IEEE},
  isbn = {978-1-4577-1048-3},
}