Jordan Lai. SRAM Design Techniques for Sub-nano CMOS Technology. In 14th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2006), 2-4 August 2006, Taipei, Taiwan. IEEE Computer Society, 2006. [doi]
@inproceedings{Lai06:7,
title = {SRAM Design Techniques for Sub-nano CMOS Technology},
author = {Jordan Lai},
year = {2006},
doi = {10.1109/MTDT.2006.29},
url = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2006.29},
tags = {design},
researchr = {https://researchr.org/publication/Lai06%3A7},
cites = {0},
citedby = {0},
booktitle = {14th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2006), 2-4 August 2006, Taipei, Taiwan},
publisher = {IEEE Computer Society},
isbn = {0-7695-2572-5},
}