VCLEARIT: a VLSI CMOS circuit leakage reduction technique for nanoscale technologies

Preetham Lakshmikanthan, Adrian Nunez. VCLEARIT: a VLSI CMOS circuit leakage reduction technique for nanoscale technologies. SIGARCH Computer Architecture News, 35(5):10-16, 2007. [doi]

@article{LakshmikanthanN07,
  title = {VCLEARIT: a VLSI CMOS circuit leakage reduction technique for nanoscale technologies},
  author = {Preetham Lakshmikanthan and Adrian Nunez},
  year = {2007},
  doi = {10.1145/1360464.1360471},
  url = {http://doi.acm.org/10.1145/1360464.1360471},
  researchr = {https://researchr.org/publication/LakshmikanthanN07},
  cites = {0},
  citedby = {0},
  journal = {SIGARCH Computer Architecture News},
  volume = {35},
  number = {5},
  pages = {10-16},
}