A VHDL-AMS Case Study: The Incremental Design of an Efficient 3:::rd::: Generation MOS Model of a Deep Sub Micron Transistor - researchr publication authors

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Christophe Lallement, François Pêcheux, Yannick Hervé. A VHDL-AMS Case Study: The Incremental Design of an Efficient 3:::rd::: Generation MOS Model of a Deep Sub Micron Transistor. In Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes, editors, SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC 01), December 3-5, 2001, Montpellier, France. Volume 218 of IFIP Conference Proceedings, pages 349-360, Kluwer, 2001.

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