Huiying Lan, Zidong Du. DLIR: An Intermediate Representation for Deep Learning Processors. In Feng Zhang 0007, Jidong Zhai, Marc Snir, Hai Jin 0001, Hironori Kasahara, Mateo Valero, editors, Network and Parallel Computing - 15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 29 - December 1, 2018, Proceedings. Volume 11276 of Lecture Notes in Computer Science, pages 169-173, Springer, 2018. [doi]
@inproceedings{LanD18,
title = {DLIR: An Intermediate Representation for Deep Learning Processors},
author = {Huiying Lan and Zidong Du},
year = {2018},
doi = {10.1007/978-3-030-05677-3_19},
url = {https://doi.org/10.1007/978-3-030-05677-3_19},
researchr = {https://researchr.org/publication/LanD18},
cites = {0},
citedby = {0},
pages = {169-173},
booktitle = {Network and Parallel Computing - 15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 29 - December 1, 2018, Proceedings},
editor = {Feng Zhang 0007 and Jidong Zhai and Marc Snir and Hai Jin 0001 and Hironori Kasahara and Mateo Valero},
volume = {11276},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {978-3-030-05677-3},
}