The SPEEDY Family of Block Ciphers Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures

Gregor Leander, Thorben Moos, Amir Moradi 0001, Shahram Rasoolzadeh. The SPEEDY Family of Block Ciphers Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures. IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021(4):510-545, 2021. [doi]

@article{LeanderMMR21-0,
  title = {The SPEEDY Family of Block Ciphers Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures},
  author = {Gregor Leander and Thorben Moos and Amir Moradi 0001 and Shahram Rasoolzadeh},
  year = {2021},
  doi = {10.46586/tches.v2021.i4.510-545},
  url = {https://doi.org/10.46586/tches.v2021.i4.510-545},
  researchr = {https://researchr.org/publication/LeanderMMR21-0},
  cites = {0},
  citedby = {0},
  journal = {IACR Trans. Cryptogr. Hardw. Embed. Syst.},
  volume = {2021},
  number = {4},
  pages = {510-545},
}