The SPEEDY Family of Block Ciphers - Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures

Gregor Leander, Thorben Moos, Amir Moradi 0001, Shahram Rasoolzadeh. The SPEEDY Family of Block Ciphers - Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures. IACR Cryptology ePrint Archive, 2021:960, 2021. [doi]

@article{LeanderMMR21,
  title = {The SPEEDY Family of Block Ciphers - Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures},
  author = {Gregor Leander and Thorben Moos and Amir Moradi 0001 and Shahram Rasoolzadeh},
  year = {2021},
  url = {https://eprint.iacr.org/2021/960},
  researchr = {https://researchr.org/publication/LeanderMMR21},
  cites = {0},
  citedby = {0},
  journal = {IACR Cryptology ePrint Archive},
  volume = {2021},
  pages = {960},
}