Logic synthesis for cellular architecture FPGAs using BDDs

Gueesang Lee. Logic synthesis for cellular architecture FPGAs using BDDs. In Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997. pages 253-258, IEEE, 1997. [doi]

@inproceedings{Lee97-6,
  title = {Logic synthesis for cellular architecture FPGAs using BDDs},
  author = {Gueesang Lee},
  year = {1997},
  doi = {10.1109/ASPDAC.1997.600136},
  url = {http://dx.doi.org/10.1109/ASPDAC.1997.600136},
  researchr = {https://researchr.org/publication/Lee97-6},
  cites = {0},
  citedby = {0},
  pages = {253-258},
  booktitle = {Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997},
  publisher = {IEEE},
  isbn = {0-7803-3663-1},
}