Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP)

Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh. Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP). In 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 24-27 October 2007, Gramado, RS, Brazil. pages 211-218, IEEE Computer Society, 2007. [doi]

@inproceedings{LeeBB07,
  title = {Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP)},
  author = {Seung Eun Lee and Jun Ho Bahn and Nader Bagherzadeh},
  year = {2007},
  doi = {10.1109/SBAC-PAD.2007.18},
  url = {http://doi.ieeecomputersociety.org/10.1109/SBAC-PAD.2007.18},
  tags = {design},
  researchr = {https://researchr.org/publication/LeeBB07},
  cites = {0},
  citedby = {0},
  pages = {211-218},
  booktitle = {19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 24-27 October 2007, Gramado, RS, Brazil},
  publisher = {IEEE Computer Society},
}