Hyunjin Lee, Sangyeun Cho, Bruce R. Childers. Exploring the interplay of yield, area, and performance in processor caches. In 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings. pages 216-223, IEEE, 2007. [doi]
@inproceedings{LeeCC07:1,
title = {Exploring the interplay of yield, area, and performance in processor caches},
author = {Hyunjin Lee and Sangyeun Cho and Bruce R. Childers},
year = {2007},
doi = {10.1109/ICCD.2007.4601905},
url = {http://dx.doi.org/10.1109/ICCD.2007.4601905},
tags = {caching},
researchr = {https://researchr.org/publication/LeeCC07%3A1},
cites = {0},
citedby = {0},
pages = {216-223},
booktitle = {25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings},
publisher = {IEEE},
isbn = {1-4244-1258-7},
}