Jong-Ho Lee, Yun-Jeong Kim, Suki Kim, Kwang-Hyun Baek. 4-bit 2-Gsample/s flash A/D converter using latched-skewed-logic in 0.13um CMOS. In 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008. pages 267-270, IEEE, 2008. [doi]
@inproceedings{LeeKKB08,
title = {4-bit 2-Gsample/s flash A/D converter using latched-skewed-logic in 0.13um CMOS},
author = {Jong-Ho Lee and Yun-Jeong Kim and Suki Kim and Kwang-Hyun Baek},
year = {2008},
doi = {10.1109/ICECS.2008.4674842},
url = {http://dx.doi.org/10.1109/ICECS.2008.4674842},
researchr = {https://researchr.org/publication/LeeKKB08},
cites = {0},
citedby = {0},
pages = {267-270},
booktitle = {15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008},
publisher = {IEEE},
isbn = {978-1-4244-2181-7},
}