Design of a 1.8V 8-bit 500MSPS folding-interpolation CMOS A/D converter with a folder averaging technique

DongJin Lee, Jaewon Song, Jongha Shin, Sanghoon Hwang, Minkyu Song, Tad Wysocki. Design of a 1.8V 8-bit 500MSPS folding-interpolation CMOS A/D converter with a folder averaging technique. In 18th European Conference on Circuit Theory and Design, ECCTD 2007, Seville, Spain, August 26-30, 2007. pages 356-359, IEEE, 2007. [doi]

@inproceedings{LeeSSHSW07,
  title = {Design of a 1.8V 8-bit 500MSPS folding-interpolation CMOS A/D converter with a folder averaging technique},
  author = {DongJin Lee and Jaewon Song and Jongha Shin and Sanghoon Hwang and Minkyu Song and Tad Wysocki},
  year = {2007},
  doi = {10.1109/ECCTD.2007.4529606},
  url = {https://doi.org/10.1109/ECCTD.2007.4529606},
  researchr = {https://researchr.org/publication/LeeSSHSW07},
  cites = {0},
  citedby = {0},
  pages = {356-359},
  booktitle = {18th European Conference on Circuit Theory and Design, ECCTD 2007, Seville, Spain, August 26-30, 2007},
  publisher = {IEEE},
  isbn = {978-1-4244-1341-6},
}