Shuenn Gi Lee, Chung-Hsuan Wang, Wern-Ho Sheen. Architecture Design of QPP Interleaver for Parallel Turbo Decoding. In Proceedings of the 71th IEEE Vehicular Technology Conference, VTC Spring 2010, 16-19 May 2010, Taipei, Taiwan. pages 1-5, IEEE, 2010. [doi]
@inproceedings{LeeWS10,
title = {Architecture Design of QPP Interleaver for Parallel Turbo Decoding},
author = {Shuenn Gi Lee and Chung-Hsuan Wang and Wern-Ho Sheen},
year = {2010},
doi = {10.1109/VETECS.2010.5493793},
url = {http://dx.doi.org/10.1109/VETECS.2010.5493793},
tags = {architecture, design},
researchr = {https://researchr.org/publication/LeeWS10},
cites = {0},
citedby = {0},
pages = {1-5},
booktitle = {Proceedings of the 71th IEEE Vehicular Technology Conference, VTC Spring 2010, 16-19 May 2010, Taipei, Taiwan},
publisher = {IEEE},
}