High level synthesis and generating FPGAs with the BEDROC system

Miriam Leeser, Richard Chapman, Mark Aagaard, Mark H. Linderman, Stephan Meier. High level synthesis and generating FPGAs with the BEDROC system. VLSI Signal Processing, 6(2):191-214, 1993. [doi]

@article{LeeserCALM93,
  title = {High level synthesis and generating FPGAs with the BEDROC system},
  author = {Miriam Leeser and Richard Chapman and Mark Aagaard and Mark H. Linderman and Stephan Meier},
  year = {1993},
  doi = {10.1007/BF01607881},
  url = {http://dx.doi.org/10.1007/BF01607881},
  researchr = {https://researchr.org/publication/LeeserCALM93},
  cites = {0},
  citedby = {0},
  journal = {VLSI Signal Processing},
  volume = {6},
  number = {2},
  pages = {191-214},
}