Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems

Jingwen Leng, Alper Buyuktosunoglu, Ramon Bertran, Pradip Bose, Quan Chen 0002, Minyi Guo, Vijay Janapa Reddi. Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems. In IEEE International Symposium on High Performance Computer Architecture, HPCA 2020, San Diego, CA, USA, February 22-26, 2020. pages 44-57, IEEE, 2020. [doi]

@inproceedings{LengBBB0GR20,
  title = {Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems},
  author = {Jingwen Leng and Alper Buyuktosunoglu and Ramon Bertran and Pradip Bose and Quan Chen 0002 and Minyi Guo and Vijay Janapa Reddi},
  year = {2020},
  doi = {10.1109/HPCA47549.2020.00014},
  url = {https://doi.org/10.1109/HPCA47549.2020.00014},
  researchr = {https://researchr.org/publication/LengBBB0GR20},
  cites = {0},
  citedby = {0},
  pages = {44-57},
  booktitle = {IEEE International Symposium on High Performance Computer Architecture, HPCA 2020, San Diego, CA, USA, February 22-26, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-6149-5},
}