A Universal ZVS Circuit Design Method for a Family of Interleaved High Step-Up Converters With Least Device Requirement - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Xinying Li, Yan Zhang 0040, Jinjun Liu, Cheng Nie, Yue Yang. A Universal ZVS Circuit Design Method for a Family of Interleaved High Step-Up Converters With Least Device Requirement. IEEE Transactions on Industrial Electronics, 68(12):12396-12407, 2021. [doi]

This author has not been identified. Look up 'Xinying Li' in GoogleThis author has not been identified. Look up 'Yan Zhang 0040' in GoogleThis author has not been identified. Look up 'Jinjun Liu' in GoogleThis author has not been identified. Look up 'Cheng Nie' in GoogleThis author has not been identified. Look up 'Yue Yang' in Google

runs on WebDSL