Exploiting Test Resource Optimization in Data Path Synthesis for BIST

Xiaowei Li, Paul Y. S. Cheung. Exploiting Test Resource Optimization in Data Path Synthesis for BIST. In 9th Great Lakes Symposium on VLSI (GLS-VLSI 99), 4-6 March 1999, Ann Arbor, MI, USA. pages 342-343, IEEE Computer Society, 1999. [doi]

Authors

Xiaowei Li

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Paul Y. S. Cheung

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