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UTPlaceF 2.0: A High-Performance Clock-Aware FPGA Placement Engine

Wuxi Li, Yibo Lin, Meng Li 0004, Shounak Dhar, David Z. Pan. UTPlaceF 2.0: A High-Performance Clock-Aware FPGA Placement Engine. ACM Trans. Design Autom. Electr. Syst., 23(4), 2018. [doi]

Authors

Wuxi Li

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Yibo Lin

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Meng Li 0004

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Shounak Dhar

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David Z. Pan

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