Parameterized Hardware Verification Through a Term-Level Generalized Symbolic Trajectory Evaluation

Yongjian Li, Bow-Yaw Wang. Parameterized Hardware Verification Through a Term-Level Generalized Symbolic Trajectory Evaluation. In Yamine Aït Ameur, Shengchao Qin, editors, Formal Methods and Software Engineering - 21st International Conference on Formal Engineering Methods, ICFEM 2019, Shenzhen, China, November 5-9, 2019, Proceedings. Volume 11852 of Lecture Notes in Computer Science, pages 403-419, Springer, 2019. [doi]

@inproceedings{LiW19-45,
  title = {Parameterized Hardware Verification Through a Term-Level Generalized Symbolic Trajectory Evaluation},
  author = {Yongjian Li and Bow-Yaw Wang},
  year = {2019},
  doi = {10.1007/978-3-030-32409-4_25},
  url = {https://doi.org/10.1007/978-3-030-32409-4_25},
  researchr = {https://researchr.org/publication/LiW19-45},
  cites = {0},
  citedby = {0},
  pages = {403-419},
  booktitle = {Formal Methods and Software Engineering - 21st International Conference on Formal Engineering Methods, ICFEM 2019, Shenzhen, China, November 5-9, 2019, Proceedings},
  editor = {Yamine Aït Ameur and Shengchao Qin},
  volume = {11852},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-030-32409-4},
}