VLSI architecture of a high-performance neural spiking activity simulator based on generalized Volterra kernel

Will X. Y. Li, Yao Xin, Dong Song, Theodore W. Berger, Ray C. C. Cheung. VLSI architecture of a high-performance neural spiking activity simulator based on generalized Volterra kernel. In 2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014. pages 272-275, IEEE, 2014. [doi]

Authors

Will X. Y. Li

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Yao Xin

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Dong Song

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Theodore W. Berger

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Ray C. C. Cheung

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