Wei Li, Houxiang Zhang. A FPGA based ultrasonic rail flaw detection system. In 2017 IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2017, Bilbao, Spain, December 18-20, 2017. pages 150-155, IEEE Computer Society, 2017. [doi]
@inproceedings{LiZ17-63,
title = {A FPGA based ultrasonic rail flaw detection system},
author = {Wei Li and Houxiang Zhang},
year = {2017},
doi = {10.1109/ISSPIT.2017.8388633},
url = {http://doi.ieeecomputersociety.org/10.1109/ISSPIT.2017.8388633},
researchr = {https://researchr.org/publication/LiZ17-63},
cites = {0},
citedby = {0},
pages = {150-155},
booktitle = {2017 IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2017, Bilbao, Spain, December 18-20, 2017},
publisher = {IEEE Computer Society},
isbn = {978-1-5386-4662-5},
}