Tiejun Li, Jianmin Zhang, Siqing Fu, Kefan Ma. A Variable-Way Address Translation Cache for the Exascale Supercomputer. In Yongxuan Lai, Tian Wang 0001, Min Jiang 0005, Guangquan Xu, Wei Liang 0005, Aniello Castiglione, editors, Algorithms and Architectures for Parallel Processing - 21st International Conference, ICA3PP 2021, Virtual Event, December 3-5, 2021, Proceedings, Part III. Volume 13157 of Lecture Notes in Computer Science, pages 231-244, Springer, 2021. [doi]
@inproceedings{LiZFM21,
title = {A Variable-Way Address Translation Cache for the Exascale Supercomputer},
author = {Tiejun Li and Jianmin Zhang and Siqing Fu and Kefan Ma},
year = {2021},
doi = {10.1007/978-3-030-95391-1_15},
url = {https://doi.org/10.1007/978-3-030-95391-1_15},
researchr = {https://researchr.org/publication/LiZFM21},
cites = {0},
citedby = {0},
pages = {231-244},
booktitle = {Algorithms and Architectures for Parallel Processing - 21st International Conference, ICA3PP 2021, Virtual Event, December 3-5, 2021, Proceedings, Part III},
editor = {Yongxuan Lai and Tian Wang 0001 and Min Jiang 0005 and Guangquan Xu and Wei Liang 0005 and Aniello Castiglione},
volume = {13157},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {978-3-030-95391-1},
}