C1C: A configurable, compiler-guided STT-RAM L1 cache

Yong Li 0009, Yaojun Zhang, Hai Li, Yiran Chen, Alex K. Jones. C1C: A configurable, compiler-guided STT-RAM L1 cache. TACO, 10(4):52, 2013. [doi]

@article{LiZLCJ13,
  title = {C1C: A configurable, compiler-guided STT-RAM L1 cache},
  author = {Yong Li 0009 and Yaojun Zhang and Hai Li and Yiran Chen and Alex K. Jones},
  year = {2013},
  doi = {10.1145/2541228.2555308},
  url = {http://doi.acm.org/10.1145/2541228.2555308},
  researchr = {https://researchr.org/publication/LiZLCJ13},
  cites = {0},
  citedby = {0},
  journal = {TACO},
  volume = {10},
  number = {4},
  pages = {52},
}