Standard BiCMOS Implementation of a Two-Peak Negative Differential Resistance Circuit with High and Adjustable Peak-to-Valley Current Ratio - researchr publication related

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Dong-Shong Liang, Kwang-Jow Gan, Cheng-Chi Tai, Cher-Shiung Tsai. Standard BiCMOS Implementation of a Two-Peak Negative Differential Resistance Circuit with High and Adjustable Peak-to-Valley Current Ratio. IEICE Transactions, 92-C(5):635-638, 2009. [doi]

The following publications are possibly variants of this publication:

Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current SourcesKwang-Jow Gan, Dong-Shong Liang, Yan-Wun Chen. ieicet, 93-D(8):2068-2072, 2010. [doi]

Investigation of Adjustable Current-Voltage Characteristics and Hysteresis Phenomena for Multiple-Peak Negative Differential Resistance CircuitKwang-Jow Gan, Dong-Shong Liang. ieicet, 93-C(4):514-520, 2010. [doi]

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