ESD protection design for high-speed circuits in nanoscale CMOS process

Chun-Yu Lin, Rong-Kun Chang. ESD protection design for high-speed circuits in nanoscale CMOS process. In International Symposium on Integrated Circuits, ISIC 2016, Singapore, December 12-14, 2016. pages 1-4, IEEE, 2016. [doi]

Authors

Chun-Yu Lin

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Rong-Kun Chang

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