An Error Resilient Design Platform for Aggressively Reducing Power, Area and Routing Congestion

Tung-Liang Lin, Sao-Jie Chen. An Error Resilient Design Platform for Aggressively Reducing Power, Area and Routing Congestion. In 22nd International Symposium on Quality Electronic Design, ISQED 2021, Santa Clara, CA, USA, April 7-9, 2021. pages 172-177, IEEE, 2021. [doi]

@inproceedings{LinC21-7,
  title = {An Error Resilient Design Platform for Aggressively Reducing Power, Area and Routing Congestion},
  author = {Tung-Liang Lin and Sao-Jie Chen},
  year = {2021},
  doi = {10.1109/ISQED51717.2021.9424298},
  url = {https://doi.org/10.1109/ISQED51717.2021.9424298},
  researchr = {https://researchr.org/publication/LinC21-7},
  cites = {0},
  citedby = {0},
  pages = {172-177},
  booktitle = {22nd International Symposium on Quality Electronic Design, ISQED 2021, Santa Clara, CA, USA, April 7-9, 2021},
  publisher = {IEEE},
  isbn = {978-1-7281-7641-3},
}