Wei-Chen Lin, Ya-chu Chang, Juinn-Dar Huang. An Efficient and Low-Power MLP Accelerator Architecture Supporting Structured Pruning, Sparse Activations and Asymmetric Quantization for Edge Computing. In 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021, Washington, DC, USA, June 6-9, 2021. pages 1-5, IEEE, 2021. [doi]
@inproceedings{LinCH21-2,
title = {An Efficient and Low-Power MLP Accelerator Architecture Supporting Structured Pruning, Sparse Activations and Asymmetric Quantization for Edge Computing},
author = {Wei-Chen Lin and Ya-chu Chang and Juinn-Dar Huang},
year = {2021},
doi = {10.1109/AICAS51828.2021.9458511},
url = {https://doi.org/10.1109/AICAS51828.2021.9458511},
researchr = {https://researchr.org/publication/LinCH21-2},
cites = {0},
citedby = {0},
pages = {1-5},
booktitle = {3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021, Washington, DC, USA, June 6-9, 2021},
publisher = {IEEE},
isbn = {978-1-6654-1913-0},
}