Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

I-Cheng Lin, Chih-Yao Huang, Chuan-Jane Chao, Ming-Dou Ker. Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product. Microelectronics Reliability, 43(8):1295-1301, 2003. [doi]

@article{LinHCK03,
  title = {Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product},
  author = {I-Cheng Lin and Chih-Yao Huang and Chuan-Jane Chao and Ming-Dou Ker},
  year = {2003},
  doi = {10.1016/S0026-2714(03)00139-2},
  url = {http://dx.doi.org/10.1016/S0026-2714(03)00139-2},
  researchr = {https://researchr.org/publication/LinHCK03},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {43},
  number = {8},
  pages = {1295-1301},
}