An efficient algorithm of adjustable delay buffer insertion for clock skew minimization in multiple dynamic supply voltage designs

Kuan-Yu Lin, Hong-Ting Lin, Tsung-Yi Ho. An efficient algorithm of adjustable delay buffer insertion for clock skew minimization in multiple dynamic supply voltage designs. In Proceedings of the 16th Asia South Pacific Design Automation Conference, ASP-DAC 2011, Yokohama, Japan, January 25-27, 2011. pages 825-830, IEEE, 2011. [doi]

Authors

Kuan-Yu Lin

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Hong-Ting Lin

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Tsung-Yi Ho

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