Bicheng Liu, Shouzhen Gu, Mingsong Chen, Wang Kang, Jingtong Hu, Qingfeng Zhuge, Edwin Hsing-Mean Sha. An Efficient Racetrack Memory-Based Processing-in-Memory Architecture for Convolutional Neural Networks. In 2017 IEEE International Symposium on Parallel and Distributed Processing with Applications and 2017 IEEE International Conference on Ubiquitous Computing and Communications (ISPA/IUCC), Guangzhou, China, December 12-15, 2017. pages 383-390, IEEE, 2017. [doi]
@inproceedings{LiuGCKHZS17,
title = {An Efficient Racetrack Memory-Based Processing-in-Memory Architecture for Convolutional Neural Networks},
author = {Bicheng Liu and Shouzhen Gu and Mingsong Chen and Wang Kang and Jingtong Hu and Qingfeng Zhuge and Edwin Hsing-Mean Sha},
year = {2017},
doi = {10.1109/ISPA/IUCC.2017.00061},
url = {http://doi.ieeecomputersociety.org/10.1109/ISPA/IUCC.2017.00061},
researchr = {https://researchr.org/publication/LiuGCKHZS17},
cites = {0},
citedby = {0},
pages = {383-390},
booktitle = {2017 IEEE International Symposium on Parallel and Distributed Processing with Applications and 2017 IEEE International Conference on Ubiquitous Computing and Communications (ISPA/IUCC), Guangzhou, China, December 12-15, 2017},
publisher = {IEEE},
isbn = {978-1-5386-3790-6},
}