FPGA-based Acceleration of Deep Neural Networks Using High Level Method

Lei Liu, Jianlu Luo, Xiaoyan Deng, Sikun Li. FPGA-based Acceleration of Deep Neural Networks Using High Level Method. In Fatos Xhafa, Leonard Barolli, Fabrizio Messina, Marek R. Ogiela, editors, 10th International Conference on P2P, Parallel, Grid, Cloud and Internet Computing, 3PGCIC 2015, Krakow, Poland, November 4-6, 2015. pages 824-827, IEEE Computer Society, 2015. [doi]

@inproceedings{LiuLDL15-0,
  title = {FPGA-based Acceleration of Deep Neural Networks Using High Level Method},
  author = {Lei Liu and Jianlu Luo and Xiaoyan Deng and Sikun Li},
  year = {2015},
  doi = {10.1109/3PGCIC.2015.103},
  url = {http://doi.ieeecomputersociety.org/10.1109/3PGCIC.2015.103},
  researchr = {https://researchr.org/publication/LiuLDL15-0},
  cites = {0},
  citedby = {0},
  pages = {824-827},
  booktitle = {10th International Conference on P2P, Parallel, Grid, Cloud and Internet Computing, 3PGCIC 2015, Krakow, Poland, November 4-6, 2015},
  editor = {Fatos Xhafa and Leonard Barolli and Fabrizio Messina and Marek R. Ogiela},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-9473-4},
}